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PD - 95370A
SMPS MOSFET
IRFR24N15DPbF IRFU24N15DPBF
HEXFET(R) Power MOSFET
Applications l High frequency DC-DC converters l Lead-Free Benefits
l l
VDSS
150V
RDS(on) max
95m
ID
24A
l
Low Gate-to-Drain Charge to Reduce Switching Losses Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) Fully Characterized Avalanche Voltage and Current
D-Pak IRFR24N15D
I-Pak IRFU24N15D
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
24 17 96 140 0.92 30 4.9 -55 to + 175 300 (1.6mm from case )
Units
A W W/C V V/ns C
Thermal Resistance
Parameter
RJC RJA RJA Junction-to-Case Junction-to-Ambient (PCB mount)* Junction-to-Ambient
Typ.
--- --- ---
Max.
1.1 50 110
Units
C/W
Notes through are on page 10
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1
1/17/05
IRFR/U24N15DPbF
Static @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 150 --- --- 3.0 --- --- --- --- Typ. --- 0.18 82 --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 95 m VGS = 10V, ID = 14A 5.0 V VDS = VGS, ID = 250A 25 VDS = 150V, VGS = 0V A 250 VDS = 120V, VGS = 0V, TJ = 150C 100 VGS = 30V nA -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 8.2 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- 30 7.4 17 11 53 19 15 890 220 46 1460 95 200 Max. Units Conditions --- S VDS = 25V, ID = 14A 45 ID = 14A 11 nC VDS = 120V 26 VGS = 10V, --- VDD = 75V --- ID = 14A ns --- RG = 6.8 --- VGS = 10V --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 120V, = 1.0MHz --- VGS = 0V, VDS = 0V to 120V
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
170 14 14
Units
mJ A mJ
Diode Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 24 --- --- showing the A G integral reverse --- --- 96 S p-n junction diode. --- --- 1.5 V TJ = 25C, IS = 14A, VGS = 0V --- 110 --- ns TJ = 25C, IF = 14A --- 450 --- nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFR/U24N15DPbF
1000
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
100
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
10
10
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
1
5.0V
1
0.1
5.0V
0.01
20s PULSE WIDTH Tj = 25C
0.001 0.1 1 10 100
20s PULSE WIDTH Tj = 175C
0.1 0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.0
I D = 24A
TJ = 175 C
2.5
RDS(on) , Drain-to-Source On Resistance
I D, Drain-to-Source Current (A)
10
2.0
(Normalized)
1.5
1
1.0
TJ = 25 C
V DS= 50V 20s PULSE WIDTH 0.1 4 6 8 10 12 14 16
0.5
V GS = 10V
0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
V GS Gate-to-Source Voltage (V) ,
TJ , Junction Temperature
( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFR/U24N15DPbF
10000 VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds
VGS , Gate-to-Source Voltage (V)
12
I D = 14A
10
VDS = 120V VDS = 75V VDS = 30V
C, Capacitance(pF)
1000
Ciss
8
6
Coss
100
4
Crss
2
10 1 10 100 1000
0 0 5 10 15 20 25 30 35
VDS, Drain-to-Source Voltage (V)
QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
I SD , Reverse Drain Current (A)
TJ = 175 C
10
ID, Drain-to-Source Current (A)
100
10
100sec 1msec
T J= 25 C
1
1 Tc = 25C Tj = 175C Single Pulse 0.1 1 10 100 10msec
V GS = 0 V
0.1 0.0 0.5 1.0 1.5 2.0 2.5
1000
V SD ,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFR/U24N15DPbF
25
V DS VGS
RD
20
RG VGS
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
ID , Drain Current (A)
15
10
Fig 10a. Switching Time Test Circuit
5
VDS 90%
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
10
(Z thJC )
1 D = 0.50
Thermal Response
0.20 0.10 0.1 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = 2. Peak T 0.01 0.00001 0.0001 0.001 0.01 t1 / t 2 +T C 1 P DM t1 t2
J = P DM x Z thJC
0.1
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U24N15DPbF
15V
320
TOP
RG
20V
D.U.T
IAS tp
+ V - DD
A
EAS , Single Pulse Avalanche Energy (mJ)
VDS
L
DRIVER
240
BOTTOM
ID 5.9A 10A 14A
160
0.01
Fig 12a. Unclamped Inductive Test Circuit
80
V(BR)DSS tp
0 25 50 75 100 125 150 175
Starting Tj, Junction Temperature
( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
QG
12V .2F
50K .3F
QGS VG
QGD
D.U.T. VGS
3mA
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFR/U24N15DPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRFR/U24N15DPbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFR120 WITH AS SEMBLY LOT CODE 1234 ASSEMBLED ON WW 16, 1999 IN THE AS SEMBLY LINE "A" Note: "P" in ass embly line position indicates "Lead-Free" PART NUMBER INT ERNATIONAL RECT IFIER LOGO
IRFU120 12 916A 34
ASSEMBLY LOT CODE
DAT E CODE YEAR 9 = 1999 WEEK 16 LINE A
OR
PART NUMBER INTERNAT IONAL RECTIFIER LOGO
IRFU120 12 34
DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 9 = 1999 WEEK 16 A = ASS EMBLY SITE CODE
ASS EMBLY LOT CODE
8
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IRFR/U24N15DPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFU120 WIT H ASSEMBLY LOT CODE 5678 ASSE MBLE D ON WW 19, 1999 IN T HE ASSEMBLY LINE "A" Note: "P" in ass embly line pos ition indicates "Lead-Free" PART NUMBER INTE RNAT IONAL RECT IF IER LOGO
IRFU120 919A 56 78
ASSEMBLY LOT CODE
DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A
OR
PART NUMBE R INT ERNAT IONAL RECTIF IER LOGO
IRFU120 56 78
AS SEMBLY LOT CODE
DATE CODE P = DES IGNAT ES LEAD-F REE PRODUCT (OPTIONAL) YEAR 9 = 1999 WE EK 19 A = ASS EMBLY SIT E CODE
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IRFR/U24N15DPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
16.3 ( .641 ) 15.7 ( .619 )
16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Starting TJ = 25C, L = 1.7mH
RG = 25, IAS = 14A.
ISD 14A, di/dt 380A/s, VDD V(BR)DSS,
TJ 175C. * When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.01/05
10
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Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/

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